Some Core Memory

An DEC MM8EJ core memory module

8K memory for a PDP-8/E computer

Part of the Core Memory pages
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science



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This module contains 8k 12-bit words. The module consists of 3 boards 10.436 inches (265 mm) wide by 8.5 inches (216 mm) from edge connector to the flat backs of handles (excluding the actual handle). The boards are 0.056 inches (1.42 mm) thick and spaced on 1/2 inch (12.7 mm) centers. The dimensions are specified on pages 8 and 9 of Digital's 1972 Logic Handbook, excepting the board spacing which can be inferred from the dimensions of the H803 connector block on page 379 of the Handbook. Deduct 1/16 inch (1.59 mm) from the board height where there are no handles (determined by measurement of an actual DEC board).

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As with the 4K MM8E memory, the outer two boards contain addressing and read-write electronics, while the middle board contains the actual core memory. The memory appears to be arranged as two rows of 6 patches, each containing 128 rows of 64 cores, for a total of cores, for a total of 98,304 cores.

In fact, this organization is misleading. Close examination of the sense line wiring reveals that the board contains 4 rows of 3 patches, where each patch contains 64 rows of 128 columns, and as in the 4K MM8E memory, the patches are subdivided into sub-patches, here side-by-side, where each sub-patch holds 64 rows of 64 cores.

The core plane occupies an area 4.30 inches wide (109 mm) by 4.61 inches (117 mm) high. Each patch of 8K bits is therefore 1.433 inches (36.4 mm) wide by 1.156 inches (29.4 mm) high, with sub-patches 0.717 inches (18.2 mm) wide. The cores themselves are 0.018 inches (0.46 mm) in diameter and 0.004 inches (0.10 mm) thick with a 0.011 inch (0.28 mm) hole. The photo to the right shows the view through the long-focus measuring microscope used to take the core dimensions.

The X and Y addressing wires run the full height and width of the core plane, passing through multiple 8K patches as they do so. At the edges of the plane, a subset of the X and Y wires are brought out and soldered to printed-circuit-board traces, while the other wires enter a bundle where they reenter the core plane. Each individual X and Y wire begins at an edge of the plane and then traverses every 4K patch before exiting the plane at the opposing edge.

Each 8K patch has a single pair of sense-inhibit wires, each of which traverses half of the cores in the plane, but because they are tied together at one end, they form a single sense line that visits every core in the plane. These enter and leave the plane at the two lower corners, and when not in the plane, the pair is twisted, with all of the twisted pairs glued together into a rope of sense-inhibit wires going out to the inter-board connectors.

As with the 4K MM8E memory, a close look at the close-up photos of this core plane reveals little black blobs on the edges of each memory patch. These are splices made to the sense lines during manufacture. There are fewer than in the 4K module, despite the tighter packing of smaller cores.

As with the 4K MM8E memory, The card-edge connectors on the bottom of each board plug into the backplane of the computer, whle DEC H851 connectors on top are used for interboard connections. See the writeup on the 4K version for photos.

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The G297 Memory Select board reads the 12-bit memory address and the low bit of the 3-bit extended memory address from the backplane and (in conjunction with some diode arrays on the memory board itself) translates the address into pulses on exactly one of 64 X drive lines and one of 64 Y drive lines. This takes a fair amount of power, as evidenced by the heat sinks on 4 of the transistors on this board.

Unlike the G227, the corresponding board in the 4K MM8E memory, this board has no handle marked with the board number, just a paper sticker with a hand-scrawled number and a DEC quality-control stamp. The flip side has very little lettering in the etch, but with difficulty, it is possible to see 8K X-Y written upward along the right edge of the board.

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The G111 Memory Sense-Inhibit board contains the sense amplifiers needed to extract data from the memory during a read operation and also the logic to drivers to inhibit writing for those bits that should be set to zero during a write cycle. All connections to the data bus are on this board. Again, high power required to read and write core memory, as evidenced by the row of 12 large 16.9Ω 1% power resistors across the center of the board.

The sense-inhibit board contains the decoder for the top 2 bits of the 3-bit memory field, inhibiting all activity on the MM8EJ memory subsystem if the field is not selected. This allows up to 4 8K memory modules to be installed on one system.

There is one obvious change from the G104, the corresponding board in the 4K MM8E memory. The 12 transformers across the top of the board have been locked together by a protective plastic strip. This is an obvious measure to prevent the transformers from breaking off, a problem that was encountered on the G104 board in this collection.


A detailed explanation of the operation of the MM8EJ memory system is hard to find, but most of Section 4 of the PDP-8/E Maintenance Manual, Volume 1 applies. The 1971 and 1973 edition contain essentially the same material for the MM8E. The schematics of the MM8EJ memory system are available on line at pdp8online and highgate.

The timing of the memory cycles in the MM8E and MM8EJ modules is entirely under the control of the CPU, so there is no difference in speed between these modules. The only difference is in the packing density of the core, allowing the MM8EJ to pack twice the memory into the same size package as the MM8E.


This memory was found in a PDP-8/F purchased at the University of Iowa Surplus Sales outlet. It origianlly came from the University of Iowa Department of Psychology.

Digital Equipment Corporation parts from that era were routinely stamped with a variety of quality control stamps, many of which are cryptic, but most boards are dated. Unfortunately, only one board in this set is dated. To read the dates, it was necessary to push the constrast to maximum and then play with the exposure.

The other source of dating information we have is the quality control dates recorded on the individual integrated circuit packages. Many vendors routinely dated their ICs with dates of the form YYWW, where YY is the two digit year code and WW is the 2-digit week number within the year. If we find a quality control date on a part, we know that the board must have been made after that date, and if we assume small parts inventories, probably not long after that date. Here are some of the quality control dates:

This memory subsystem is obviously what antique dealers would call a marriage, made up of 3 boards that were made at different times. The FS on one of the dated stickers may stand for Field Service. This is the most recent of any of the dates, and it could indicate the data on which DEC's field service operation added this memory module to its inventory, making it very likely that the module was constructed from boards from other memory modules that had been returned for repair.

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The board holding the core memory has two separate identifications that are both compatible with DEC's standard board naming conventions:

Unlike the 4K MM8E memory, DEC evidently made this core plane themselves instead of hiring an original equipment manufacturer like AMPEX to string the cores. This is attested to by the warranty labels and the large sticker giving the following information:

DEC P/N     H-212
SERIAL 7812-F- -15366
SIZE    8K x 12 (375)


There are two identical DEC warranty seals on two of the 10 screws holding the plastic cover over the core plane:


The seals were broken to take some of the close-up photos of the memory plane shown here.


This memory module worked when the machine was powered up after purchase from University of Iowa Surplus, and aside from careful opening up for these photos, it has undergone no repair or modification.