Arjun Viswanathan

About MePicture from
        graduation

I am a first-year PhD student at the University of Iowa, working with Prof. Cesare Tinelli and Andrew Reynolds, as of Fall 2017. I completed my Master's in Computer Science at the University of Iowa, in Spring 2017. My research interests currently are in SMT (satisfiability modulo theories) solvers, program synthesis, and - in general - logic in computer science. I contribute to CVC4, the SMT-solver co-developed by Professor Tinelli's team at the University of Iowa.

My long-term goals, besides successfully completing my PhD, are to equip myself to efficiently teach fundamental computer science courses.

I am from South India, and graduated from MVJ College of Engineering at Bangalore, in 2015.


Contact

Location

Department of Computer Science
University of Iowa
14 Maclean Hall (MLH)
Iowa City, IA 52242-1419
USA

Email

arjun-viswanathan@uiowa.edu


Experience

Fall 2015 - Teaching Assistant, Introduction to Computer Science
Summer 2016 - SAT/SMT/AR Summer School, Lisbon, Portugal
Fall 2016 - Teaching Assistant, Algorithms
Spring 2017 -
Teaching Assistant, Programming Language Concepts
Summer 2017 - Verification Mentoring Workshop, Heidelberg, Germany
Summer 2017 - Computer-Aided Verification 2017, Heidelberg, Germany



Publications

Working on it!