Assignment 11, due Apr 18
Part of
the homework for 22C:60 (CS:2630), Spring 2014
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On every assignment, write your name legibly as it appears on your University ID card! Homework is due on paper at the start of class on the day indicated (usually Friday). Exceptions will be made only by advance arrangement (excepting "acts of God"). Late work must be turned in to the TA's mailbox (ask the CS receptionist in 14 MLH for help). Never push homework under someone's door!
c = ad
d = bc
Assume that each logic element, and, or, nand, nor and not has a propagation delay of exactly one nanosecond, where this matters.
a) Draw a logic circuit for this, using the conventional graphic notation for and, or, nand, nor and not gates. Neatness, proportion and organizaiton all count. (0.5 points)
b) Complete this timing diagram, showing the output of the above circuit in response to changes in its inputs:
| ._._._. . . . . . . . . ._._._._._._. . . ._._._._._._._._._._ a |_| |_________________| |_____| | . . . . . . ._._._. . . . . . ._._._._._._._._._. . . ._._._._ b |_____________| |___________| |_____| | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . c | | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d | |_._._._._._._._._._._._._._._._._._._._._._._._._._._._._._._._ | TIME -------> (each dot is one nanosecond)
You may photocopy, cut and paste, or copy (with ruler) or use graph paper, but neatness matters. The grader will discount illegible work. (0.5 points)
c) Identify the connections to this circuit that would be conventionally labeled R, S, R, S, Q or Q if any. (0.5 points)
PUTCHAT:; expects R3 = ch, a character to be plotted on the screen ; R4 = x, the unsigned integer x coordinate ; R5 = y, the unsigned integer y coordinate
The following SMAL definitions are useful in accessing the Hawk display:
; memory mapped display interface DISPBASE = #FF000000 ; base memory address of the display interface DISPLINES = 0 ; - displacement of the lines interface register DISPCOLS = 4 ; - displacement of the columns interface register DISPTEXT = #100 ; - displacement to the start of video RAM
a) Write code to load the base address of the display interface into R6. (0.3 points)
b) Given that the y coordinate to be used is in R5, the base address of the display interface is in R6, and R7 is available as a scratch register, write code to check that the y coordinate is on screen and branch to OFFSCR if it is not. (0.3 points)
c) Given that the base address of the display interface is in R6, write the best possible code to load the starting address of the video RAM in R8. (0.3 points)
d) Given that the address of the video RAM is in R8, the base address of the display interface is in R6, and the y coordinate is in R5, write code to compute the starting address in video RAM of the display line at that y coordinate and leave that address in R8. This will involve a call to the TIMESU monitor routine. (0.3 points)
e) Which registers discussed above contain information that is still needed after step d) but will be wiped out by the computation described required by step d? (0.3 points)