Assignment 9, due Apr 12

On every assignment, write your name legibly as it appears on your University ID card! Homework is due on paper at the start of class on the day indicated (usually Friday). Exceptions will be made only by advance arrangement (excepting "acts of God"). Late work must be turned in to the TA's mailbox (ask the CS receptionist in 14 MLH for help). Never push homework under someone's door!

1. Background: Suppose you wanted to write a floating point package for a down-market version of the Hawk that had no floating point hardware. You'd have to do it in software, and your first challenge would be to design the interface to your package. You opt to use two data representations: Single precision, with a one-word exponent field and a one-word mantissa field, and double precision, with a one-word exponent field and a two-word mantissa field. Having read Chapter 10 of the notes, you decide that you will implement this as a polymorphic class.

   The parent class, float, has two subclasses, single-float and double-float. All floating point numbers have methods FADD, FSUB. (Yes, real useful floating point numbers will have more methods, but this is a toy example). From a high-level language perspective, the statement a=b+c would be objectified as in your system as a.fadd(b,c).

   a) Write an appropriate SMAL Hawk header file, float.h, that defines the interface to the parent class. This will contain some comments and a few definitions. (0.5 points)

   b) Given that the variables a, b and c are local variables of the current subroutine that point to floating point objects, give code that is equivalent to a.fadd(b,c). Note that you do not know which floating point representation is involved, so you cannot directly call the floating point operation.

2. Background: Usually, we are interested in great big floating point numbers. IEEE format, for example, works with a minimum of 32 bits -- a sign, 8 bits of exponent, and 24 bits of mantissa (including a hidden bit). Here, we are interested in working at the opposite extreme. Consider a system with 3-bit floating point numbers. One bit for the sign, one bit for the exponent, and one bit for the mantissa, with no hidden bit. Assume the point is to the left of the most significant mantissa bit, and assume the exponent has is a biased number with the natural bias bias.

   a) Enumerate the signed fixed point decimal equivalents of all of these (0.3 points)

   b) What is the minimum number of bits you need in the exponent field in order to support an IEEE-style number with support for normalized floating point numbers, non-normalized numbers and NANs (IEEE-style not-a-numbers). (0.2 points)

   c) Enumerate signed fixed-point decimal equivalents of all of the numbers you get in this scheme. There will be more entries in your table than in the answer for part a, but the table should not be too big to imagine writing down. (0.5 points)

3. Background: The type D latch given in Chapter 12 of the notes (about 2/5 of the way through the chapter) uses 4 nand gates and one inverter. It is interesting that, if you replace all of these nand gates with nor gates, keeping all other details of the circuit the same, the result is useful.

   a) Draw the schematic diagram that incorporates this change. Neatness counts. Label the inputs and outputs "oldD", "oldC", "oldQ", etc. in order to emphasize that the labels might not reflect the new purpose of those connections. (0.3 points)

   b) Draw the timing diagram. As inputs, use the exact same sequence as shown in the timing diagram in the notes (but re-label so "C" is "oldC", etc). You are not required to give the intermediate values at the points labeled R and S in the figure, but they are certainly useful in working out the correct answer. (0.5 points)

   c) Give appropriate labels for the points originally labeled old. That is, what should "oldC" be called, what should "oldD" be called, etc. These labels should reflect the function. If a Data input line exists, call it D. If it behaves as a flipflop, call the outputs Q and Qbar, and if one of those outputs can be set to the data input, call that one Q. If positive pulses on the clock input cause a data transfer, clock should be called C. If negative pulses cause data transfer, clock should be called Cbar. (0.2 points)