Machine Problem 8, due at the end of Dec 4

Part of the homework for CS:2630, Fall 2023
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science

Top Level Specification: In solving MP6, you should have noticed that it would be nice if the Hawk had a SLR instruction, meaning shift left or right by an amount given in a register. If a right shift, for our purposes, make it an unsigned right shift (left shifts don't have a distinction between signed and unsigned). The syntax and semantics are easy to propose:

	SLR	R3,R4	; if R4 > 0, R3 = R3 << R4
			; if R4 < 0, R3 = R3 >>> R4

Of course, if the shift count is outside the range –31 to +31, the result should be zero. Applying SLR to R0 as source or destination makes no sense. In addition, SLR should set the condition codes as follows:
— N set if result is negative
— Z set if result is zero
— V never set
— C never set

If this instruction were available, it would have replacd 31 instructions in the posted solution to MP6/7. The problem is, it is not available on our version of the Hawk.

As the Hawk is currently defined, the assembler will complain if you write MOVESL R3,R0,4 because R0 is not permitted as a source register for MOVESL. If the Hawk emulator encounters that instruction, encoded as the two bytes B3 04 or the halfword 04B3, you will get an Instruction trap.

Your job is to write an instruction trap handler for the opcode Bd 0s or 0sBd to implement the SLR instruction.

Resources: You can find a complete and tested instruction trap handler here:

http://homepage.cs.uiowa.edu/~dwjones/assem/fall19/hw/mp6solb.txt

Feel free to use this as a starting point. Currently, this trap handler detects the opcode Fd 1x or 1xFd and uses it to implement the LOADNA instruction, an instruction that works exactly like LOAD but with support for non-aligned memory access.

If you use this code as a starting point, you should have stripped out everything involving LOADNA by the time you turn in your solution, except a new comment giving credit to your source.

You can use the following macro to assemble code to test your SLR instruction. It is written in the style of macros from hawk.h and assumes that USE "hawk.h" has already been done:

MACRO SLR =dst,=src
  qNZREGq dst
  qNZREGq src
  qTWOREGq #B000,dst,src
ENDMAC

To test your program, consider fixing the solution to MP6/7 so it uses the new SLR instruction instead of the 31 or so lines of code in that solution that currently does left and right shifting by variable amounts. Assuming that your source code is in mp7sol.a and mp7test.a, and that you have assembled them to create mp7sol.o and mp7test.o, you can link them with your code for testing with:

hawklink mp8.o mp7sol.o mp7test.o

You may find it useful, for debugging, to take out the S MAIN directive from mp7test.a and put an S directive in your MP8 solution so the Hawk emulator stops there and lets you single step through your code to see what is going on.

By giving your object code first on the hawklink command, your code will start at location 100016, making it easy to relate addresses in your assembly listing to addresses at run time.

Grading: Your code must:

Your code must, of course, be readable, with carefully written comments and careful attention to use of whitespace, both in the code and comments.

Your code must, of course, pass the format checks in

[HawkID@fastx?? ~]$ ~dwjones/format mp8.a

This assignment is worth 5 points, 2.5 points for correct behavior, including all edge cases, and 2.5 points for clean implementation, well chosen algorithms, efficiency, formatting and commentary.

We strongly recommend that you put off worrying about edge cases until you have the core functionality working. Edge cases not covered will be penalized a maximum of 0.5 points each.

Submission: To submit your work, it must be in a file named mp8.a in your current directory on the CLAS Linux system, and you must know your section number. In the following, what you type is shown in bold face. Begin at the linux command-line prompt:

[HawkID@fastx?? ~]$ ~dwjones/submit 0A0X mp8.a

The submission script will copy your code and, after the copy is made, it will output a message saying "successful submission." You may resubmit as many times as you want; each time you resubmit, your previous submission of that file will be replaced, so we will only see your final submission.

In the event of insurmountable trouble, do not delete or edit files you have submitted until the graded work is returned. The operating system record of the last edit time and date and the backups maintained by the operating system are proof of what you did and when, and they allow us to investigate what happened. until your graded work is returned. This way, the time stamp marking the time of last edit is a trustworthy indicator of whether you did the work on time.


Discussion

Nov. 28, 8:28 PM

I ... was wondering if we should use unsigned shifts for both right and left shifts, or only left shifts as is described on the problem page?

That was a "thinko" on my part. I have changed the text in the assignment to correct it. There is no distinction between signed and unsigned left shifts on the Hawk, the distinction exists only for right shifts. So yes, use an unsigned right shift!

Dec. 1, 10:51 PM

About the condition codes: Right now, my code has a correct condition code for the output, until I get to CPUSET R1,PSW in the trap exit code. There, NZVC is set to 0000. In the Hawk manual, it says that CPUSET shouldn't change the condition codes.

The condition codes are part of the processor status word. CPUSET does generally change the conditon codes, but when it is used to change the PSW, it changes the entire PSW, including the condition codes.

Consider a trap service routine that did some kind of virtualization that was not supposed to change the condition codes. Say, for example, doing some kind of TLB update for the MMU or virtualizing an instruction that was supposed to have no effect on the condition codes. In that case restoring the PSW on return from trap must restore the saved condition codes exactly as they were at the time of the trap.

So, if the virtualized instructio is supposed to change the condition codes, the values it must change are not the values in the condition codes inside the trap handler, but rather, it must change the values in the saved PSW that will be used to return from trap.

This is exactly the same issue as you face when a virtualized instruction changes any other register. In virtualizing SLR R5,R7, your code does not change R5 directly. Instead, it changes the saved value of R5 that will be restored during the return from trap.