Assignment 12, due Nov Dec 5

Remember to write your name on what you turn in! Homework must be turned in on paper and in class!

Homework

1. Background: The notes suggest 2-word exception variables holding the address of the handler and the activation record pointer for the handler. Consider this alternative: The second word of any activation record for a routine with an active exception handler points to the entry point of that handler. (The first word of each activation record is the return address.) The global exception variable is just a pointer to the topmost activation record on the stack that has an active handler.

   a) Give the code to throw an exception using this model. (0.5 points)

   b) This model is not as universal as the model discussed in the notes. What can the model in the notes do that this exception model cannot. (0.5 points)

2. A problem: What opcodes are undefined on the Hawk? Several instructions are defined such that one or the other register field must not be zero. Ignore these, and look only for opcodes (and subsidiary opcode fields) that are fully undefined. (0.5 points)

3. A Problem: Currently, the Hawk traps all unimplemented instructions. Suppose you wanted to write an unimplemented instruction interrupt service routine that converted all unimplemented instructions to no-ops. Thus, the only computation in the interrupt service routine would be PC=PC+1 (applied to the saved PC from the interrupted code). Write the shortest unimplemented instruction trap service routine you can devise to do this. It should minimise saving and restoring of registers! (0.5 points)

4. Background: According to Section 1.3.4.6 of the Hawk manual, bit 4 of the Hawk MMU data register indicates, if 1, that it is legal to use cache memory to speed access to this page.

   a) Consider a machine with both L1 and L2 cache, where the MMU lies between the two, as illustrated in the figure for a complete system in Chapter 14 of the notes. Which cache does this bit turn off? (0.5 points)

   b) Why is this bit needed? That is, under what circumstances is it necessary to prevent the cache from accelerating the execution of a LOAD or STORE instruction. (0.5 points)