Homework 1 Solutions

22C:116, Spring 1997

Ioana M. Lungeanu
Problem 2

   For Hawk fictional machine, http://homepage.cs.uiowa.edu/~dwjones/arch/hawk
   The CPU state includes: 15 general purpose registers, program counter
   and the condition code register (the other special trap reagisters
   are not realy needed for our problem).

   The data structure(with 17 words):

		svPSW = 0 <<2  ;for PSW
		svR1  = 1 <<2  ;for registers
		svR2 =  2 <<2
		svR3 =  3 <<2
		svR4 =  4 <<2
		svR5 =  5 <<2
		svR6 =  6 <<2
		svR7 =  7 <<2
		svR8 =  8 <<2
		svR9 =  9 <<2
		svRA = 10 <<2
		svRB = 11 <<2
		svRC = 12 <<2
		svRD = 13 <<2
		svRE = 14 <<2
		svRF = 15 <<2
		svPC = 16 <<2  ;for PC

Problem 3

   The procedure Switch is called after a trap with the 2 parameters oldp
   and newp being pointers of two records with the above structure. Our
   job is easier on this particular architecture due to the existance of
   an automatic save of the program counter when a trap accurs, in TPC. 

	oldp:	W	OLD
	newp:	W	NEW

		;first saves the CPU state in OLD
		TSVSET  R1		;save R1	
		LOAD	R1,oldp		;get the pointer where to save
		STORE 	R2,R1,svR2	;save R2	
		STORE 	R3,R1,svR3	;save R3	
		STORE 	R4,R1,svR4	;save R4	
		..................	;save R5-R15
		STORE	R2,R1,svR1	;save R1
		STORE	R3,R1,svPC	;save PC
		STORE	R4,R1,svPSW	;save PSW
		;secondly restores the CPU state from NEW
		LOAD 	R1,newp		get the pointer to new state
		LOAD	R4,R1,svR4	;restore R4
		..................	;restore R5-r15	
		LOAD	R2,R1,svPC	 
		LOAD	R3,R1,svPWD
		TPCSET	R2		;put PC into TPC
		PSWSET	R3		;restore PSW	
		LOAD	R3,R1,svR3	;restore R3
		LOAD	R2,R1,svR2	;restore R2
		LOAD	R1,R1,svR1	;restore R1
		RTT			;Go to the new state 

Problem 4

   A device driver is a piece of system software which handles 
   the low-level communication between a particular device
   (or family of familiar devices) and the computer to which
   is connected, acting as a mediator between the higher-level
   system software and the device. It is the responsability of 
   the device driver to deal with the low-level details and 
   peculiarities of the device. It hides the device dependent 
   features, thus providing the user with an abstract model of
   the device. Thus, the user can communicate with the device
   at a higher level, and all devices of a similar nature can
   be accessed in a uniform manner, which is conceptually easier
   to understand and use.

Problem 5

   CPU's ussually have two execution modes: user mode and kernel
   mode. A privileged instruction is an instruction which can be
   executed in kernel mode only. The operating system runs in
   kernel mode whereas user programs run in user mode. Thus,
   user programs do not have access to proviledged instructions.
   This set-up provides a measure of security against tampering 
   of the hardware and software by users. In particular, the
   user can access resources only through the "proper channels"
   (system calls). This preserves the function of the operating
   system as resource manager.

   If a priviledged instruction is encountered in user mode,
   a trap is generated. The operating system must service the
   trap in an appropriate manner, e.g. by terminating the offending

   Commonly I/O instructions are priviledged. For a user having
   access to I/O instructions would be able to overwrite system
   software, access password files, mess up disk drives. For similar
   reasons, trap instructions and instructions which allow direct
   manipulation of certain CPU registers (such as being able to
   arbitrarily load into the program counter) should also be