Assignment 9, due Mar 29Solutions
Part of
the homework for CS:2820, Spring 2019
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gate a input 1 1.0 0 gate b input 1 1.5 1 gate c input 1 2.0 2
You do not need a working simulator to solve this problem, and having solved it, you can use it to test part of your simulator.
a) After a while, the simulation will stop. When it stops, what are the values of the outputs of gates a, b and c? (0.4 points)
a = 1, because it never changed
b = 0, because it changed once
c = 1, because it changed twice
b) What output would you expect from a correct solution to MP4 when run on this input file? (0.6 points)
time 1.5 1->0 gate b input 1 1.5 1 time 2.0 1->0 gate c input 1 2.0 2 time 4.0 0->1 gate d input 1 2.0 2
gate in1 input ... gate in2 input ... gate xor xor 0.1 gate out output wire in1 0.1 xor wire in2 0.1 xor wire xor 0.1 out
a) Finish the definitions of in1 and in2 so that the gate goes through all four possibile combinations exactly once, excluding infinitesimal moments. That is, (in1, in2) should start out (0, 0), then switch to (0, 1), and then (1, 0) and then (1, 1), with changes occuring at times 1.0, 2.0 and 3.0. (0.5 points)
gate in1 input 0 2.0 1 gate in2 input 0 1.0 3
b) Why did the above problem statement have to say "excluding infinitesimal moments" above? That is, in the sequence of input values required, where will there be an unavoidable if infinitesimally brief extra test of input combinations? (0.3 points)
Note, this can be a problem in real logic circuits! Physical hardware can't produce infinitesimal pulses, but sometimes, due to slight random differences in gate delays, these pulses get long enough to just barely survive. The resulting "glitches" can create havoc unless the logic designer is very careful. Fixing the simulator so that gates cannot transmit infinitesimal pulses is a challenge, and fixing it so that gates have slight random elements in their delays is useful to make the simulations more realistic.
c) What change to your answer to part a would you make in order to make the test run two full cycles of all four input combinations instead of one cycle? (0.2 points)
gate in1 input 0 2.0 3 gate in2 input 0 1.0 7
a) What is (are) the parameter(s) to these methods? (0.2 points)
The time (obvious) and the new logic value being carried over the wire.
b) Give the simplest Java code you can for Wire.inputChange. (0.4 points)
public void inputChange( float now, int value ) { Simulation.schedule( now + travelTime, (float t)->this.outputChange( t, value ) ); }
The one obvious addition to this code would be a check to see if the value of the wire was really being changed. We'd like to believe that the gate driving this wire wouldn't be dumb enough to call inputChange to change the input from 1 to 1, since that isn't really a change. We could play it safe and save the previous value so we can only schedule an output change if there was a real input change.
c) Give the simplest Java code you can for Wire.outputChange. (0.4 points)
public void outputChange( float now, int value ) { destination.inputChange( now, value ); }