A PDP-8/L core memory module Memory for a PDP-8/L computer Part of the Core Memory pages by Douglas W. Jones THE UNIVERSITY OF IOWA Department of Computer Science

Contents

• Overview
• Documentation
• Provenance
• Condition

This memory module from a PDP-8/L computer consists of a stack of 5 permanently joined boards cabled to two additional boards that serve to increase the number of card-edge contacts. All of the boards are 1/16 inch (1.59 mm) thick. On this computer, the backplane is on top, so the boards fit in from below. Nonetheless, we illustrate the boards with the card-edge connectors face down.

The outer two boards of the 5-board stack are 5 15/16 inches (161 mm) high from the tip of the card-edge connector to the opposite edge, 5 3/16 inches (132 mm) wide and mounted to one-inch (25.4 mm) centers. The outer boards, (labeled G610B and G611B etched in copper foil) contain diode matrices and serve to physically protect the actual core stack.

The 3 inner boards make up the actual core stack. Each board holds 4 patches of 64 by 64 bits, giving a total of 4096 12-bit words. These boards are 5 inches (127 mm) square and mounted on 7/32 inch (5.56 mm) centers. The core boards have a 1/2 inch (12.5 mm) margin, so the 4 patches of core in each plane share a 4-inch (102 mm) square area on each board. The cores themselves are 0.030 inches (0.76 mm) in diameter and 0.010 inches (0.25 mm) thick with a 0.018 inch (0.46 mm) hole, as measured with a long-focal length measuring microscope. The X and Y wires within each patch of core have an average center to center spacing of 0.0303 inch (0.770 mm).

The auxiliary connector paddles are 4 15/16 inches (125 mm) high and 5 3/16 inches (132 mm) wide, excluding the handles. The boards are DEC standard W025B connector boards, a board that DEC frequently used for low density peripheral interface cables. Each is cabled to the core assembly by 12 twisted pairs, one pair per bit, which is to say, one pair per patch of core plane. One of these boards (with red-white wire pairs) is labeled SENSE, while the other (with black-white pairs) is labeled INHIBIT and carries the manufacturer's label. Separate connectors for sense and inhibit make it clear that this is a 4-wire core system.

The edge views of the core module shown to the right show that the five boards of the core stack are mechanically attached by 4 screws through the corners, with aluminum spacers. Removal of these screws, however would not release the boards, because rows of electrical connections also join the boards. While the sense and inhibit wires leave the stack in tightly laced but flexible cable bundles, the X and Y addressing wires, a total of 128 wires, are routed from board to board by groups of 32 closely spaced rigid wire posts, each soldered to a pair of boards. Each X or Y addressing wire bridges from one of the outer diode matrix boards to the other, passing throug a total of 4 of these soldered posts as it jumps from board to board.

A close view of the edge of the boards shows that the spacing of the interboard connectors is exactly twice the spacing between rows of cores. Every other wire in the core plane therefore traverses from the opposite side of the assembly.

Documentation

There is considerable documentation available for the PDP-8/L. The theory of operation of this memory is documented on pages 4-11 to 4-17 of the PDP-8/L Maintenance Manual (4^th printing, 1970). Vince Slyngstad has managed to collect schematics for the G610B, G611B, and W025B boards. Anders Bzn in Sweden has documented his disassembly and repair of a broken X-select wire on one plane of such a core stack, a problem that required disassembly and reassembly of the stack as well as stringing a very fine wire through a row of 64 cores. Robert Krten took the time to disassemble and photograph an irreparable core memory module, including taking some excellent microscopic view of the core itself.

Section 1.2 of the Maintenance Manual states that the "normal" cycle time for the memory is 1.6 microseconds and the add time is 3.2 microseconds. As with the original PDP-8, an add takes an instruction fetch and an operand load, each of which involves a destructive read followed by a refresh, so the cycle time quoted is a full read-refresh cycle. Hunting through the manual for instructions that involve "abnormal" cycle times reveals a collection of mostly input/output instructions that, for various reasons, involve slower cycles.

Provenance

This core stack comes from a PDP-8/L serial number 3068, donated by Michael Begly who got it from a surplus sale from Iowa State University. A plate on the machine says it was originally a gift of Harnischfeger corporation, leading to the guess that it began as a controller for some kind of CNC machine tool. PDP-8/L serial numbers appear to be in a single series, from 1 (sold in late 1968) to 3902 (sold in 1971); interpolating the serial number relative to published production figures for the 8/L suggests a sale date in the third quarter of 1970.

The board is clearly labeled:

The date code is a classic 4-digit quality-control code, 2 digits giving the week number in the year, and 2 digits of year, so this module was made in mid 1970. This date is supported by the date code 10-69 etched on the foil side of the W025B boards. The revision dates on the W025B schematics are also in 1969, while the schematics for the other two boards are dated 1966.

Condition

The machine has not been plugged in in several decades, but it appears to have been stored in clean and dry conditions. The memory module itself shows no evidence of age, dirt or corrosion and is almost certainly either usable as it or restorable.