Homework 2

22C:122, Spring 1998

Due Wednesday Feb 4, 1997, in class

1. Consider the following program fragment:

   16 bit registers: ier, icand
   32 bit registers: prod
   
   prod = ier (zero padded to 32 bits)
   loop 16 times
       if odd(prod)
         then prod := (prod >> 1) + (icand << 16)
         else prod := (prod >> 1)
   endloop
   

   Design the data-part of the register-transfer level logic needed to implement this code, clearly labeling all control signals and conditions sensed.

   And, what does this compute?

2. Propose a format for the "control word" for the data flow half of the machine you just designed.

3. Propose a control unit for the machine in problem 1.

4. Show a microcode fragment that will make this machine execute the algorithm fragment shown at the head of this assignment, using the control word format of problem 2 and the control unit of problem 3.