1.
a)
 	MOVE P,S
s:	LDA  0

	MOVE P,S
	W    acc
S:	W    0

b)
    	LDA  a
        ADD  i

C)
       	LDA  S
 	IMM add,f

2.

1) Choose that the 6-bit instruction is forbidden to
   cross word boundaries.

2)
var ir, pc, acc, sp, t: word { registers };
          m: array [word] of word { memory };
      
      while true do begin
      99: { instruction fetch }
          ir := m[pc];
          pc := pc + 1;
          repeat
              { syllable decode }
              case ir mod 8 of
                  0: { nop };
                  1: begin { dup }
                        m[sp] := acc;
                        sp := sp + 1;
                     end;
                  2: { one }  acc := acc << 1 | 1;
                  3: { zero } acc := acc << 1 | 0;
                  4: { load } acc := m[acc];
                  5: begin { pop }
                         sp := sp - 1;
                         t := m[sp];
                         m[t] := acc;
                         sp := sp - 1;
                         acc := m[sp];
                     end;
                  6: begin { RISC }
                         ir := ir div 8;
                         case ir mod 8 of
                          0: acc = data;
                          1: acc = acc - data;
                          2: acc = data - acc;
                          3: acc = data + acc;
                          4: acc = data ^ acc;
                          5: acc = data & acc;
                          6: acc = data | acc;
                          7: acc = data >> 1;
                         end {case}                  
                     end;
                  7: begin { jpos }
                         sp := sp - 1;
                         t := m[sp];
                         sp := sp - 1;
                         if t >= 0 then begin
                             pc := acc;
                             acc := m[sp];
                             goto 99;
                         end;
                         acc := m[sp];
                     end;
              end { case };
              ir := ir div 8;
          until ir = 0;
      end { while };

c)
add following to the original CISC 
_______________________________________________data
                   |
                   o---------------
                ___|___           | 
 ___    _____   |RISC |           |
|ir |--|mod_8|--|ALU  |           |
                |_____|           |
                   |              |
                 __|___________   |
         --------\_0_______1__/   |            
                       |          |
                    ___|___       |
                   |__acc__|      |
                       |-----------
                       |