7. Byte and Halfword Instructions

Part of the Hawk Manual
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science

Contents

7.1. Byte and Halfword Format
7.2. Byte and Halfword Stuffing
7.3. Byte and Halfword Extraction


7.1. Byte and Halfword Format

07060504 03020100 15141312 11100908
0 1 - - dst src x

Byte and halfword manipulation instructions are 16 bits each, and operate register to register. The destination register r[dst] is changed using data from the source register r[s1], while the least significant bits of the index register, r[x] control the which byte or halfword is selected.

Where LOADS and STORES (see Chapter 2) ignore the byte-in-word field of the effective address, using only the most significant 30 bits to select a word in memory (see Section 1.2), these instructions use only the byte-in-word field to select a byte or halfword within a word (see Section 1.1). Bytes are selected from bits b+7 to b of a word, while halfwords are selected from bits h+15 to h of a word, where b or h are computed as follows:

b = r[x]∧3 * 8   — low bit of byte

h = r[x]∧2 * 8   — low bit of halfword

7.2. Byte and Halfword Stuffing

07060504 03020100 15141312 11100908                        
0 1 1 1 dst (nz) s1 (0) x (0) STUFFB dst,s1,x r[dst]:b+7:b = r[s1]
0 1 1 0 dst (nz) s1 (0) x (0) STUFFH dst,s1,x r[dst]:h+15:h = r[s1]

STUFFB   
STUFFH
NZVC unchanged

STUFFB (stuff byte) and STUFFH (stuff halfword) move the low byte or the low halfword of r[s1] into the byte or halfword of r[dst] selected by the low 2 bits of r[x]. While the inicated byte or halfword of r[dst] is changed, the remaining bits of r[dst] are unchanged. In effect, these stuff data from r[s1] into a field of r[dst]. This has no effect on the condition codes.

In combination with LOADS and STORES (see Chapter 2), these operations are used store bytes or halfwords in memory. For example, this instruction sequence will store data from the low 8 bits of r[3] in the byte pointed to by r[4], using r[1] as a temporary register:

        LOADS  R1,R4
        STUFFB R1,R3,R4
        STORES R1,R4

This idea comes from the DEC Alpha architecture. On 32 bit machines with single store byte or store halfword instructions, the CPU may have to perform all of the computations that are made explicit in the above instruction sequence.

When s1 or x is 0, the reference to r[0] specifies the constant zero. a reference to the least significant halfword. As a result, STUFFB Rd,R0,Rx can be used to zero the selected byte of the destination, while STUFFB Rd,Rs,R0 can be used to replace the low byte of the destination with the low byte of the source. Combining these, STUFFB Rd,R0,R0 will clearl the low byte of the destination without changing any other bits.

7.3. Byte and Halfword Extraction

07060504 03020100 15141312 11100908                        
0 1 0 1 dst (x) s1 (nz) x (0) EXTB dst,s1,x r[dst] = r[s1]:b+7:b
0 1 0 0 dst (x) s1 (nz) x (0) EXTH dst,s1,x r[dst] = r[s1]:h+15:h

EXTB     
EXTH
N = 0
Z = (r[dst] = 0)  — result is zero
V = C = 0

EXTB (extract byte) and EXTH (extract halfword) move a byte or halfword from the field of r[s1] selected by the least significant two bits of r[x] into the least significant byte or halfword of r[dst], while the remaining bits of r[dst] are cleared. In effect, these extract data from a field of R[s1] into R[dst].

The extract operations set the Z condition code to report whether the extracted data was zero. The other condition codes are all cleared.

In combiation with LOADS (see Section 2.3), these operations are used to load unsigned bytes and halfwords from memory. For example, if r[4] is a pointer to a byte in memory, this instruction sequence will load the data from that byte into r[3], using r[1] as a temporary register:

        LOADS  R1,R4
        EXTB   R3,R1,R4

This idea comes from the DEC Alpha architecture. On 32 bit machines with single load byte or load halfword instructions, the CPU may have to perform all of the computations that are made explicit in the above instruction sequences.

SXT (sign extend) can be used if the byte or halfword in memory is to be interpreted as a two's complemet signed integer (see Section 9.2). For example, if r[4] is a pointer to a signed halfword in memory, this instruction sequence will load the data from that halfword into r[3], using r[1] as a temporary register:

        LOADS  R1,R4
        EXTH   R3,R1,R4
        SXT    R3,16

When x is 0, the reference to r[0] specifies the constant zero, forcing a reference to the least significant halfword. As a result, EXTB and EXTH may be used to combine the functions of MOVE (see Section 2.2) with TRUNC (see Section 9.2). For example, to extract the low byte of r[3] and move it to r[4], use:

        EXTB    R4,R3,R0

Instead of using a two instruction sequence:

        MOVE    R4,R3
        TRUNC   R4,8

When dst is 0, the reference to r[0] specifies that the result is discarded. To test if a byte or halfword is zero, without changing any registers, extract it into r[0]. For example, to test if the low halfword of r[3] is zero, use:

        EXTH    R0,R3,R0