Homework 2

22C:122, Fall 1998

Due Wednesday Sept 8, 1999, in class

1. Consider the following little function given in C:

   	unsigned int f( unsigned int i, j )
   	{
   		if (i > (j + 1)) {
   			return i;
   		} else if (j > (i + 1)) {
   			return j;
   		} else {
   			return (i + j) >> 1;
   		}
   	}
   

   Part A: How can you use hardware to compare the magnitude of two unsigned numbers? (Hint: subtraction is involved!)

   Part B: Given a mechanism that solves part A, suggest a register-transfer level realization of the above function. Adders, incrementers, multiplexors, comparators and shifters are appropriate primitive components for this design.

2. The Problem: Look at the set of arithmetic operations on the PDP-8 computer. These are divided between the Memory Reference Instructions and the Group One Microcoded Instructions From the descriptions given for the operations, and from the fact that the PDP-8 ALU combines the contents of the memory data register with the accumulator and passes the result back to the accumulator, suggest a simple register-transfer-level ALU sufficient for the PDP-8, using multiplexors, adders, and a few simple logic functions.

   Historical note: The PDP-8 was sold between 1965 and approximately 1990; the original version used discrete transistors while the final version marketed used a monolithic microprocessor implementation of the CPU (the Intersil/Harris 61xx processor family). In the 1960's, this was the most successful minicomputer on the market. The final family member to be sold was the DECmate III+ word processor.

3. The Problem: Use the Iowa Logic Simulator's input language to construct and test a version of the ALU given at the end of lecture 4.